Chip Multi Processing(CMP) aware Linux Kernel Scheduler

Recent advances in semiconductor manufacturing and engineering technologies have led to the inclusion of more than one CPU core in a single physical package. This, popularly know as Chip Multi Processing(CMP), allows multiple instruction streams to execute at the same time. CMP is in addition to today's Simultaneous Multi Threading(SMT) capabilities, like Intel® Hyper-Threading technology which allows a processor to present itself as two logical processors, resulting in best use of execution resources. With CMP, today's Linux Kernel will deliver instantaneous performance improvement. Linux Kernel scheduler could be further optimized by making it CMP aware.

In this paper, we will start with an overview of different CMP implementation's and then look into performance, power related optimization opportunities. We will describe the trade off's between peak performance and power saving requirements. We will discuss how scheduler enhancements like

* adding a new scheduler domain for CMP

* setting up domain properties based on CMP characteristics

* active load balancing in the context of CMP and SMT

will improve the peak performance. Secondly, we will look at scheduler enhancements focusing power savings. We will then present scheduling policies that an administrator can select based on the performance and power requirements. We will close the paper with a brief look at CMP trends in future generation Intel® processors.